Welcome to SiValley Technologies Pvt. Ltd. we are a leading provider of end-to-end services to Semiconductor, EDA companies in Physical Design, Layout Design, Design Verification and CAD Methodology.SiValley provides total solutions for a given requirement, which includes Physical Design, Layout Design, Design Verification and customized turnkey solutions. SiValley’s strategic partnerships with leading technology companies help provide customers with a comprehensive package of end-to-end solutions. At SiValley, we innovate to fulfil the global ASIC design needs with reliable and sustainable solutions. With the highly committed and innovative technical team and technical leadership, SiValley is all set to serve for needs in ASIC Design.Service OfferingsASIC Physical Design: Floorplanning & Partitioning Place & Route, CTS Physical Verification STA, GDS GenerationLayout Design: Analog, Memory, RF Layout Design IO Layout, Standard Cell Design Chip Integration, Chip Sign off and Tapeout AMS VerificationASIC Design and Verification: IP Verification SoC/Subsystem Integration and Verification DFT Synthesis, LECCurrent Openings: 1. Analog Layout DesignExperience: 4 - 12 YearsTools: Cadence Virtuoso2. Physical DesignExperience: 4 - 15 YearsTools: ICC, SoC Encounter, Olympus, Prime Time3. RTL VerificationExperience: 3-5 yearsTools: NCSim, QuestaSim, VCS4. Standardcell CharacterizationExperience: 3-5 yearsTools: Liberate5. AMS VerificationExperience: 3-5 yearsTools: Spectre, ADE L, virtuoso, Spice6. Memory LayoutExperience: 2 - 5 yearsTools: Cadence Virtuoso7. DFTExperience: 2 - 5 yearsTools: Modus, TetraMax, TessentContact: hr@sivalleytech.com or visit http://www.sivalleytech.com/job-opportunities/